.TH "rte_pmd_ifpga.h" 3 "Version 25.11.0" "DPDK" \" -*- nroff -*-
.ad l
.nh
.SH NAME
rte_pmd_ifpga.h
.SH SYNOPSIS
.br
.PP
\fR#include <stdint\&.h>\fP
.br

.SS "Data Structures"

.in +1c
.ti -1c
.RI "struct \fBrte_pmd_ifpga_uuid\fP"
.br
.ti -1c
.RI "struct \fBrte_pmd_ifpga_common_prop\fP"
.br
.ti -1c
.RI "struct \fBrte_pmd_ifpga_port_prop\fP"
.br
.ti -1c
.RI "struct \fBrte_pmd_ifpga_prop\fP"
.br
.ti -1c
.RI "struct \fBrte_pmd_ifpga_phy_info\fP"
.br
.in -1c
.SS "Functions"

.in +1c
.ti -1c
.RI "int \fBrte_pmd_ifpga_get_dev_id\fP (const char *pci_addr, uint16_t *dev_id)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_get_rsu_status\fP (uint16_t dev_id, uint32_t *stat, uint32_t *prog)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_set_rsu_status\fP (uint16_t dev_id, uint32_t stat, uint32_t prog)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_get_property\fP (uint16_t dev_id, \fBrte_pmd_ifpga_prop\fP *prop)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_get_phy_info\fP (uint16_t dev_id, \fBrte_pmd_ifpga_phy_info\fP *info)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_update_flash\fP (uint16_t dev_id, const char *image, uint64_t *status)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_stop_update\fP (uint16_t dev_id, int force)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_reboot_try\fP (uint16_t dev_id)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_reload\fP (uint16_t dev_id, int type, int page)"
.br
.ti -1c
.RI "int \fBrte_pmd_ifpga_partial_reconfigure\fP (uint16_t dev_id, int port, const char *file)"
.br
.ti -1c
.RI "void \fBrte_pmd_ifpga_cleanup\fP (void)"
.br
.in -1c
.SH "Detailed Description"
.PP 
ifpga PMD specific functions\&.

.PP
\fBEXPERIMENTAL:\fP this API may change, or be removed, without prior notice 
.PP
Definition in file \fBrte_pmd_ifpga\&.h\fP\&.
.SH "Function Documentation"
.PP 
.SS "int rte_pmd_ifpga_get_dev_id (const char * pci_addr, uint16_t * dev_id)"
Get raw device ID from PCI address string like 'Domain:Bus:Dev\&.Func'

.PP
\fBParameters\fP
.RS 4
\fIpci_addr\fP The PCI address of specified Intel FPGA device\&. 
.br
\fIdev_id\fP The buffer to output device ID\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-EINVAL) if bad parameter\&.
.IP "\(bu" 2
(-ENODEV) if FPGA is not probed by ifpga driver\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_get_rsu_status (uint16_t dev_id, uint32_t * stat, uint32_t * prog)"
Get current RSU status of the specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIstat\fP The buffer to output RSU status\&. 
.br
\fIprog\fP The buffer to output RSU progress\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-ENOMEM) if share data is not initialized\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_set_rsu_status (uint16_t dev_id, uint32_t stat, uint32_t prog)"
Set current RSU status of the specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIstat\fP The RSU status value to set\&. 
.br
\fIprog\fP The RSU progress value to set\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-ENOMEM) if share data is not initialized\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_get_property (uint16_t dev_id, \fBrte_pmd_ifpga_prop\fP * prop)"
Get FPGA property of specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIprop\fP The data pointer of FPGA property buffer\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-EBUSY) if FPGA is rebooting\&.
.IP "\(bu" 2
(-EIO) if failed to access hardware\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_get_phy_info (uint16_t dev_id, \fBrte_pmd_ifpga_phy_info\fP * info)"
Get PHY information of specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIinfo\fP The data pointer of PHY information buffer\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-EBUSY) if FPGA is rebooting\&.
.IP "\(bu" 2
(-EIO) if failed to access hardware\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_update_flash (uint16_t dev_id, const char * image, uint64_t * status)"
Update image flash of specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIimage\fP The image file name string\&. 
.br
\fIstatus\fP The detailed update status for debug\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-EINVAL) if bad parameter or staging area is not initialized\&.
.IP "\(bu" 2
(-EBUSY) if FPGA is updating or rebooting\&.
.IP "\(bu" 2
(-EIO) if failed to open image file\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_stop_update (uint16_t dev_id, int force)"
Stop flash update of specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIforce\fP Abort the update process by writing register if set non-zero\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-EINVAL) if bad parameter\&.
.IP "\(bu" 2
(-EAGAIN) if failed with force\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_reboot_try (uint16_t dev_id)"
Check current Intel FPGA status and change it to reboot status if it is idle

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if FPGA is ready to reboot\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-ENOMEM) if share data is not initialized\&.
.IP "\(bu" 2
(-EBUSY) if FPGA is updating or rebooting\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_reload (uint16_t dev_id, int type, int page)"
Trigger full reconfiguration of specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fItype\fP Select reconfiguration type\&. 0 - reconfigure FPGA only\&. 1 - reboot the whole card including FPGA\&. 
.br
\fIpage\fP Select image from which flash partition\&. 0 - factory partition\&. 1 - user partition\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-ENODEV) if dev_id is invalid\&.
.IP "\(bu" 2
(-EINVAL) if bad parameter\&.
.IP "\(bu" 2
(-EBUSY) if failed to access BMC register\&. 
.PP
.RE
.PP

.SS "int rte_pmd_ifpga_partial_reconfigure (uint16_t dev_id, int port, const char * file)"
Perform PR (partial reconfiguration) on specified Intel FPGA device

.PP
\fBParameters\fP
.RS 4
\fIdev_id\fP The raw device ID of specified Intel FPGA device\&. 
.br
\fIport\fP The port index of the partial reconfiguration area\&. 
.br
\fIfile\fP The GBS (Green BitStream) image file name string\&. 
.RE
.PP
\fBReturns\fP
.RS 4
.IP "\(bu" 2
(0) if successful\&.
.IP "\(bu" 2
(-EINVAL) if bad parameter or operation failed\&.
.IP "\(bu" 2
(-ENOMEM) if failed to allocate memory\&. 
.PP
.RE
.PP

.SS "void rte_pmd_ifpga_cleanup (void )"
Free software resources allocated by Intel FPGA PMD 
.SH "Author"
.PP 
Generated automatically by Doxygen for DPDK from the source code\&.