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GENLIB_LOCON.3(October 1, 1997) GENLIB_LOCON.3(October 1, 1997)

NAME

GENLIB_LOCON - adds a logical connector to the current netlist figure

SYNOPSYS

#include <genlib.h>
void GENLIB_LOCON(connector, direction, signal);
char ∗connector, ∗signal;
char direction;

ORIGIN

This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris, France.

Web : http://asim.lip6.fr/recherche/alliance/
E-mail : alliance-users@asim.lip6.fr

PARAMETERS

Name of the connector to be created in the current figure
Indicates the connector behaviour regarding signals propagation
Name of the signal on which the connector is linked

DESCRIPTION

LOCON add a logical connector to the interface of the actual working figure. This connector is logicaly linked to the signal signal. The direction attribut may take the following values:

as input.
as output.
as input/output, like supplies or clock for example.
if one doesn't know what it is.
as high impedance output.
as transciever. That means TRISTATE input plus output.

ERROR

"GENLIB_LOCON impossible : missing GENLIB_DEF_LOFIG"

No figure has been yet specified by a call to DEF_LOFIG. So it isn't possible to add anything. you must call DEF_LOFIG before any other netlist call.
"GENLIB_LOCON : Bad signal or connector bus name"
A signal or connector, described under a bus form, has an illegal syntax.
"GENLIB_LOCON : All LOCON should be defined befor any GENLIB_LOINS"
A connector is added after instances. This is a methodological error. Only move your LOCON before the first LOINS in your code.
"GENLIB_LOCON : different number of signals and connectors"
A bussed form of signal and connector has been used, but the width of the busses are not equal. This is an obvious error, check it.
"Illegal addlocon. Connector connector already exist in figure figname"
A connector name must be unique in a given figure at a given hierachy level.

DIAGNOSTICS

Due to the vti file format, the direction of connectors is lost if one uses it as starting point of a netlist desciption. All the connectors have then the UNKNOWN direction.
Alliance and edif file format know only about IN, OUT, and UNKNOWN. Only vhdl format fully supports the whole thing.

EXAMPLE

#include <genlib.h>
main()
{
	/∗ Create a figure to work on  ∗/
	GENLIB_DEF_LOFIG("mycell");
	/∗ define interface  ∗/
	GENLIB_LOCON("i", INPUT, "sig1");
	GENLIB_LOCON("o", OUTPUT, "sig2");
	/∗ Place an instance ∗/
	GENLIB_LOINS("model","instance", "sig1", "sig2", EOL);
	/∗ Save all that on disk ∗/
	GENLIB_SAVE_LOFIG();
}

SEE ALSO

genlib(1), GENLIB_BUS(3), GENLIB_ELM(3), GENLIB_LOSIG(3), GENLIB_LOINS(3).

BUG REPORT

This tool is under development at the ASIM department of the LIP6 laboratory.
We need your feedback to improve documentation and tools.

ASIM/LIP6 PROCEDURAL GENERATION LANGUAGE