NAME¶

BOOM - BOOlean Minimization

 

ORIGIN¶

This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris, France. Web : http://asim.lip6.fr/recherche/alliance/ E-mail : alliance-users@asim.lip6.fr

SYNOPSIS¶

boom [-VTOAP] [-l num] [-d num] [-i num] [-a num] [-sjbgpwtmorn]

filename [outname]

 

DESCRIPTION¶

BOOM is used for the first step of the synthesis process. It optimizes a behavioural description using a Reduced Ordered Binary Decision Diagram representation of logic functions. The file filename is the input behavioural description and must be written in vbe(5) format. The resulting behavioural optimized description is saved with the name outname or input_name_o in vbe(5) format.

ENVIRONMENT VARIABLES¶

MBK_WORK_LIB(1)

indicates the path to the read/write directory for the session.

 

 

OPTIONS¶

-V

Verbose mode on. Each step of the optimization is displayed on the standard output.

-T

Trace mode on. Some debug informations are displayed on the standard output.

-O

Reverses initial Bdd variables order.

-A

BOOM performs a local optimization and keeps the architecture of the initial description by saving most of the intermediate signals. This mode is well-suited for big or regular circuits such as multipliers, adders. By default BOOM performs a global optimization and removes most of the intermediate signals so that the outputs are expressed in terms of the inputs or the internal registers. This mode is well-suited for random circuits such as FSMs.

-P

Uses a parameter file input_name.boom describing optimization directives and constraints. (see below for the exact syntax)

 

# Example of .boom file

#
# The list of auxiliary signals that have to be kept
# during optimization.
# Generally carry signals, ram address signals etc ...
# 
BEGIN_KEEP

carry[3:0]
ram_address[3:0]

END

#
# The list of auxiliary signals which assigned
# expression won't be modified.
# Generally it's ram output signals.
# 
BEGIN_DONT_TOUCH
ram_out[7:0]
END
    

 

-l num

Specifies the optimization level [0-3] (default is 0, low level).

-d num

Specifies the delay optimization percent (default is 0% delay, 100% surface).

-i num

Specifies the number of iterations for the choosen optimization algorithm (for experts only).

-a num

Specifies the amplitude during bdd reordering (for experts only).

-sjbgpwtmorn

Specifies which algorithm has to be used for the boolean optimization.

 

SEE ALSO¶

boom(5), vbe(5), asimut(1), boog(1), MBK_WORK_LIB(1).

BUG REPORT¶

This tool is under development at the ASIM department of the LIP6 laboratory. We need your feedback to improve documentation and tools.