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GENLIB_LOTRS.3(October 1, 1997) | GENLIB_LOTRS.3(October 1, 1997) |
NAME¶
GENLIB_LOTRS - adds a logical transistor to the current netlist figureSYNOPSYS¶
#include <genlib.h> void GENLIB_LOTRS(type,width,length,grid,source,drain) char type; long width, length; char ∗grid, ∗source, ∗drain;
ORIGIN¶
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris, France.Web : http://asim.lip6.fr/recherche/alliance/
E-mail : alliance-users@asim.lip6.fr
PARAMETERS¶
- type
- Type of the transistor to be created in the current figure
- width, length
- Size of the transistor
- grid, source, drain
- Name of the signals on which the given transistor connector are to be linked
DESCRIPTION¶
LOTRS add a logical transistor to the current working figure. This transistor has each of its pin logicaly linked to the adequat signal given as parameter. The type attribut may take the following values:- TRANSN
- for a N type mos transistor.
- TRANSP
- for a P type mos transistor.
ERROR¶
"GENLIB_LOTRS impossible : missing GENLIB_DEF_LOFIG"No figure has been yet specified by a call to
DEF_LOFIG. So it isn't possible to add anything. you must call
DEF_LOFIG before any other netlist call.
EXAMPLE¶
#include <genlib.h> main() { /∗ Create a figure to work on, an inverter ∗/ GENLIB_DEF_LOFIG("n1"); /∗ define interface ∗/ GENLIB_LOCON("i", IN, "input"); GENLIB_LOCON("f", OUT, "output"); GENLIB_LOCON("vdd", IN, "vdd"); GENLIB_LOCON("vss", IN, "vss"); /∗ Place transistors ∗/ GENLIB_LOTRS(TRANSP, 5, 4, "input", "vdd", "output"); GENLIB_LOTRS(TRANSN, 2, 4, "input", "vss", "output"); /∗ Save all that on disk ∗/ GENLIB_SAVE_LOFIG(); }
SEE ALSO¶
genlib(1), GENLIB_BUS(3), GENLIB_ELM(3), GENLIB_LOINS(3), GENLIB_LOCON(3).BUG REPORT¶
This tool is under development at the ASIM department of the LIP6 laboratory.We need your feedback to improve documentation and tools.
ASIM/LIP6 | PROCEDURAL GENERATION LANGUAGE |